Expert Details
Semiconductor Wafer and Packaging Materials, Process, Equipment & Quality
ID: 725449
Arizona, USA
Electronic Assembly and packaging
Project / Program Management
Metallurgical Engineering & Materials
Senior Western USA Consulting Manager for Digital Equipment Engineering and Manufacturing - likely 20+ major clients like Intel, Motorola, US Navy, Signetics, Medtronics, Whirlpool, Jared.He has consulted on Quality, Business Process Re-Engineering, Efficiency, Cost, Board Soldering, Lead-free Solder, Extended consultinhg contract for Tru-Si Technologies on processing of ultra-thin silicon wafers; thru-hole contacts; equipment developments
Education
| Year | Degree | Subject | Institution |
|---|---|---|---|
| Year: 1966 | Degree: B.S. | Subject: Metallurgical Engineering | Institution: Univ of Missouri, School Of Mines |
| Year: 2001 | Degree: Masters | Subject: Program Management | Institution: George Washington University |
| Year: 1974 | Degree: Masters Program - incomplete 12 hours | Subject: Inorganic Chemistry | Institution: Vassar College - IBM Program |
| Year: 1970 | Degree: Master Program - incomplete 9 hours | Subject: Solid State Physics | Institution: Syracuse |
| Year: 1984 | Degree: PhD program - incomplete 16 hours | Subject: Materials Engineering | Institution: Univ of Arizona |
Work History
| Years | Employer | Title | Department |
|---|---|---|---|
| Years: 2001 to Present | Employer: Undisclosed | Title: President, Principal Consultant | Department: |
Responsibilities:He has performed multiple consulting engagements on wafer thinning, interconnection, laser dicing, six sigma training, equipment and transport of 35um thick wafers, die cracking and analysis, stacked wafers and stacked chips, scribing and due diligence of semiconductor technology. |
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| Years | Employer | Title | Department |
| Years: 1998 to 2001 | Employer: ON Semiconductor | Title: Director Mfg Technologies & Program Manager | Department: International Manufacturing |
Responsibilities:He directed a global team of engineers in 8 countries in all areas of manufacturing materials, processes, equipment, automation, finite element analysis, design for manufacturability, wafer cost reductions, new technologies, Pb-free processing, technology development with Philips on joint factory in Malaysia. He provided joint project management & development of wafer dicing and laser dicing, minimized saw street & analysis. |
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| Years | Employer | Title | Department |
| Years: 1993 to 1998 | Employer: Motorola | Title: Director Internation Manufacturing Technology Centers | Department: Semiconductor |
Responsibilities:His responsibilities were the same as what his responsibilities were in ON Semiconductor which was a spin-off of Motorola. |
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| Years | Employer | Title | Department |
| Years: 1987 to 1993 | Employer: Digital Equipment Corp. | Title: Senior Consulting Area Manager | Department: Corporate Consulting and Sales Support |
Responsibilities:Initially, he was the operations manufacturing manager and task Force leader for microprocessor qualification - 3 years Assumed Western USA responsibility to support DEC Sales in pre-sales technical consulting and business opportunity identification (engineering and manufacturing). |
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| Years | Employer | Title | Department |
| Years: 1984 to 1987 | Employer: Intel Corp | Title: Manager Advanced Processes | Department: Assembly and Test |
Responsibilities:He staffed and managed a semiconductor assembly development group charged with new product introduction and cost reduction for 386 microprocessor. He Program Managed a major technology transfer and exchange project with uEM in Switzerland exchanging Intel wafer processing for uEM Tape Automated bonding and wafer bumping technology. |
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| Years | Employer | Title | Department |
| Years: 1967 to 1984 | Employer: IBM | Title: 6 promotions as engineer to Senior Engineer | Department: Components Divsion, East Fishkill NY |
Responsibilities:He worked in Materials, Process and Equipment development for IBM flip Chip and advanced package concepts, including thermal conduction modules, tape automated bonding, GaAs wafer processing and packaging and advanced packages for high speed computers. |
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International Experience
| Years | Country / Region | Summary |
|---|---|---|
| Years: to Present | Country / Region: Malaysia | Summary: |
| Years: to Present | Country / Region: Switzerland | Summary: |
| Years: to Present | Country / Region: Thailand | Summary: |
| Years: to Present | Country / Region: Holland | Summary: |
| Years: to Present | Country / Region: Singapore | Summary: |
Career Accomplishments
| Associations / Societies |
|---|
| IEEE Full Member ASTM ASME AIME |
| Licenses / Certifications |
|---|
| He holds a Master's Certification Project Management - George Washington University 2001. |
| Professional Appointments |
|---|
| He has been the Chairman ASTM Committees in wafer bumping and Tape Automated Bonding Standards. |
| Awards / Recognition |
|---|
| IBM Patent Level Awards (3rd tier) (32+ patents) IBM Outstanding Achievement Awards (5) Motorola Patent Award; ON Semi Patent Award Major Cost Reduction Award and Bonus (ON Semi) |
| Publications and Patents Summary |
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| He has over 20 publication in IBM Journal of Research & Development: Semicon presentations (3); Publications in Advanced Packaging Magazine; Publication In Future Fab Magazine. |
Additional Experience
| Training / Seminars |
|---|
| He delivered six sigma training to 3M in Rochester and trained IBM technicians’ class for 16 weeks on materials/processes. |
| Vendor Selection |
|---|
| He has supplier and vendor contacts and has done extensive work finding the appropriate suppliers for clients. |
| Marketing Experience |
|---|
| His industry insights include: Advisory Board MEPTEC; Advisory Board Advanced Packaging Magazine; ASTM Committee Chairman Wafer Bumping; ASTM Committe Chairman Tape Automated Bonding. |
| Other Relevant Experience |
|---|
| His expertise includes: 32 Patents and Patent Publication; Ultra-thin wafer handling, thru-hole wafer connections; Major manufacturing cost reductions; Technical Support for Sub-contractor Quality; Joint Development Project Manager for Joint Partnership Quality at High volume manufacturing in Malaysia. |
Fields of Expertise
semiconductor material processing, semiconductor wafer processing, semiconductor product quality control, integrated-circuit manufacturing, design for assembly, design for manufacturability, design-for-quality, integrated circuit assembly, manufacturing cost control, solder paste quality control, supplier quality engineering, assembly engineering, design for manufacture and assembly, discrete manufacturing, integrated-circuit packaging process, high volume, low cost product assembly, engineering project management, project cost engineering, vendor quality auditing, development engineering management, metal chemical analysis, metal failure analysis, metal heat treatment quality control, metal testing, metallurgical engineering, microstructure analysis, manufacturing quality control, supplier quality engineering, high volume, low cost product design, metal testing, manufacturing cost analysis, fatigue failure, chromium sputtering, copper sputtering, aluminum sputtering, design for cost, project cost control, project cost engineering, air quality standard, aluminum forming analysis, electronics manufacturing quality control, statistical quality control, continuous quality improvement, metal corrosion, metal failure, total quality control, quality control, metal chemical analysis, manufacturing, cost engineering, concurrent engineering