Request Expert

Presently, Expert is full Professor in the Department of Electrical and Computer Engineering at a U.S. University.

He received a Master’s degree in experimental physics in 1976, and a Ph.D. in theoretical physics in 1979, both from Tuebingen University, Germany. He has over 27 years of experience in the semiconductor industry, with a specific emphasis on the physics and manufacturing of semiconductor devices and process integration.

From 1979 to 1984, he has held technical positions at Stanford University, Purdue University, and the German Space Agency in Stuttgart, Germany. For the following 27 years he worked in the semiconductor industry, first at Siemens Laboratories (1984–1989, Munich) and then at Motorola Laboratories (1989–2004, Austin, Texas) and Freescale Semiconductor (2004–2008).

Since 2008 he has served as a Professor, where he continues his research in semiconductor device physics and technology. His present research interest are resistive RAM memory devices.

While at Siemens, he conducted research in the physics of metal-oxide semiconductor field effect transistors (MOSFETs). In 1987 he published the first explanation of a fundamental phenomenon known as the “reverse short channel effects,” which has since become a standard feature of all advanced MOSFETs. In 1989 he published an in-depth analysis that correctly predicted degradation effects in MOSFETs.

His research in semiconductor device physics at Motorola had a specific emphasis on non-volatile memories and associated physical effects, such as band-to-band tunneling. In 1990 he was the first to calculate band-to-band tunneling in MOSFETs, and correctly predicted new modes of tunneling including band-to-band tunneling in non-volatile memories.

In addition to conducting research in semiconductor physics, he successfully managed the development of several technologies. For example, while working within the Crolles consortium [Motorola (Freescale), Philips(NXP), and STMicroelectronics, Grenoble, France], he led the development of a 50 nm fully depleted silicon-on-insulator (SOI) MOSFET with TiN/HfO2 gate stack, and a 30 nm gate length SOI MOSFET. While at Motorola he managed several R&D groups. In 1989–1995 I established the first Technology Computer Aided Design (TCAD) Modeling and Simulation group at Motorola. In 1992–1995 he established the first Equipment Modeling and Simulation at Motorola. He successfully managed a Motorola-Freescale program with SOFT-TEC, a company established in 1993 by prominent Russian scientists in collaboration with the Russian Academy of Sciences, comprising 105 engineers and scientists. In 2000, he established the first Design Manual Group as an interface between the CMOS technology development and the circuit design community at Motorola/Freescale.

In 1997 he was elected a Fellow of the Institute of Electrical and Electronics Engineers (IEEE), “for contributions to the MOSFET devices and technology.”

His work in semiconductors is equally divided between device development and process development and process integration. He has developed new modules for poly gate, LOCOS and trench isolation, gate oxide, spacer and liner formation, implantation, diffusion and isotropic and anisotropic (plasma) etching.

He has 99 patents issued, including 69 US patents, being a lead inventor on 69 patents. He has received Motorola’s Distinguished Innovator Award in 1998, and Freescale’s Master Innovator Award in 2007. He has over 150 publications in refereed journals and conference proceedings of which bulk is concerned with semiconductor devices and semiconductor processing.

Consulted for SOITEC company in development of so called engineered wafers. He also advised SOITEC as to the advanced applications of Silicon-on-Insulator (SOI) wafers.Consulted with King and Spalding regarding patent litigation between Spansion and Samsung. He provided short course on Nonvolatile Memory (NVM) memory and history of NVM development. He served as an expert witness and has given sworn deposition and testimony at the trial.Consulted with McDermott Will & Emery regarding patent litigation between Spansion and Samsung. He has written an invalidity, a rebuttal to invalidity, and an infringement expert report.Consulted with Qimonda on DRAM architecture and process technology.Avago Technology v. Maxim Integrated Products litigation, worked on infringement issues for several patents, reviewed literature on tungsten "volcano" effect, reviewed and assessed several patentspatent litigation regarding FinFET transistor Kaist IP v Samsung Electronics; worked on infringement issues of a FinFET patent (2016 - ongoing)