Expert Details
Semiconductor Industry Technology, IC Process & Manufacturing, HW Systems Specialist with Patents
ID: 731865
India
He has applied his Electrical Engineering knowledge in multiple world renowned Semiconductor companies (Intel, Texas Instruments and SanDisk) to develop new semiconductor and HW products. Expert has a good mix of experience in R&D Program Management, IC Manufacturing & Testing and Technical Marketing. He often led Cross-functional teams to define new product road maps, develop cutting edge process technology, introduce new concepts to reduce manufacturing ramp time. He is professionally well networked in Semiconductor Industry, both in US and Asia and over the years, he developed good insight into competing technologies, end user applications and converging market trends for these products. In addition, he is actively networked with Educational/Research Institutes working on cutting technologies in this space.
Expert has 20 years of Industry experience in IC Design. He started his career as IC Designer and designed several Chip families in the areas of Memory, CPU chipset ICs and Mixed Signal Communication ICs. Expert has thorough understanding of various IC design process, Device performance, CAD tool flow, trade-offs, Design for HVM and reliability and has received 9 US patents for his IC design work. In addition, He has macro level understanding of IC design flow, IC Packaging etc. and the latest trends in this area
Education
| Year | Degree | Subject | Institution |
|---|---|---|---|
| Year: 1994 | Degree: MSEE | Subject: Electrical Engineering | Institution: University of Utah |
| Year: 1991 | Degree: BSEE | Subject: Electronics & Communication Engineering | Institution: College of Engineering, Guindy, Anna University |
Work History
| Years | Employer | Title | Department |
|---|---|---|---|
| Years: 2013 to Present | Employer: Undisclosed | Title: Partner & CTO | Department: |
Responsibilities:Evaluate Start-up Technology companies in the space of SW and HW areas and make recommendations for investment. Coduct Technical Due Diligence. Provide Technical Advisory if necessary |
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| Years | Employer | Title | Department |
| Years: 2009 to 2012 | Employer: Azure Capital Advisors Pvt Ltd | Title: ED & Chief Operating Officer | Department: |
Responsibilities:Responsible for Fund setup, Fund raising and project execution |
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| Years | Employer | Title | Department |
| Years: 2005 to 2009 | Employer: SanDisk Corporation | Title: Country Head - Head | Department: India Ops |
Responsibilities:He was responsible for SanDisk India operations strategy, execution in the areas of R&D (NAND Memory, Controllers, Embededded SW and SSD), Engineering & IT Outsourcing, Sales Marketing(Retail and OEM), Partner relations and Industry & Government relations. Responsible for General Management in the areas of HR, Policies and Training. |
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| Years | Employer | Title | Department |
| Years: 2003 to 2005 | Employer: Texas Instruments | Title: Department Manager | Department: Broadband & Wireless Group |
Responsibilities:He managed a Worldwide Engineering group to develop Broadband ICs and Systems. He was In-charge of Silicon IP procurement and Silicon Foundry relations |
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| Years | Employer | Title | Department |
| Years: 1995 to 2003 | Employer: Intel Corporation | Title: Program Manager | Department: Flash Memory & CPU Chipsets |
Responsibilities:Expert as R&D Program Manager to developed Flash Memory (NOR) ICs and CPU chipsets. In addition, he was responsible for taking several Chip families into High Volume Manufacturing and Testing. He proved his mettle in advanced R&D programs involving Semiconductor Process Engineering, EDA tools, Signal Integrity, Chip packaging and Testing and successfully executed. Expert received 9 patents during his tenure. As Intern Manager, he recruited and trained close 25 Engineers from leading campuses like UC Berkelely, Stanford etc... |
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| Years | Employer | Title | Department |
| Years: 1993 to 1995 | Employer: Flextronics Semiconductor Inc | Title: Design Engineer | Department: |
Responsibilities:He was responsible to develop Mixed Signal ICs |
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| Years | Employer | Title | Department |
| Years: 1992 to 1994 | Employer: University of Utah | Title: Research Assistant | Department: CVRI |
Responsibilities:He pursued his research in the areas of Signal Processing. While employed at CVRTI, Expert assisted hi Professor to develop signal processing techniques to analyze ECG |
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Career Accomplishments
| Associations / Societies |
|---|
| Active Member in Industry Bodies IESA, CII, TiE and NASSCOM |
| Awards / Recognition |
|---|
| National Technology Award from President of India. IEEE Vincent Bendix award |
| Publications and Patents Summary |
|---|
| Expert authored/co-authored 9 US Patents (Issued) |
Fields of Expertise
application-specific integrated circuit, complementary metal-oxide semiconductor device, complementary metal-oxide semiconductor integrated circuit, device physics, digital circuit design, digital computer, digital integrated circuit, integrated circuit, integrated logic circuit, integrated-circuit chip, metal-oxide semiconductor device, metal-oxide semiconductor integrated circuit, mixed-signal integrated circuit, semiconductor chip, semiconductor device, semiconductor device manufacturing, semiconductor device modeling, semiconductor device physics, semiconductor die, analog circuit design, silicon chip, transistor, integrated-circuit design, radio frequency integrated circuit, semiconductor device failure mechanism, semiconductor wafer inspection, custom integrated circuit, copper lead frame, Analog Workbench, chip-and-wire, programmable chip, bipolar complementary metal-oxide semiconductor technology, semiconductor wafer measurement, discrete semiconductor device, semiconductor device package sealing, semiconductor device thermal management, semiconductor device testing, semiconductor device package modeling and simulation, semiconductor device packaging material, semiconductor device package reliability, HSPICE software, chemical vapor deposition precursor material, integrated-circuit package, semiconductor device package, memory packaging, computer clock rate, active region, PSPICE software, very high-density integrated circuit, semiconductor device electrostatic discharge protection, semiconductor wafer fabrication facility, application-specific integrated circuit testing, binary digit, digital data acquisition, semiconductor device failure, digital data, semiconductor wafer processing, semiconductor wafer etching, bipolar integrated circuit technology, risk characterization, semiconductor wafer polishing, integrated-circuit built-in self test, power semiconductor device new product development, semiconductor device reliability, hybrid microcircuit, analog signal processor, plastic semiconductor device package, silicon semiconductor growth, boundary scan test, wide band gap semiconductor material, power semiconductor device, digital signal processing chip, characterization process, flip chip, semiconductor assembly engineering, digital signal, silicon-on-sapphire integrated circuit, computer-aided integrated-circuit design, computer-aided design, cofired multilayer ceramic packaging material, computer processor architecture, semiconductor device packaging process, very high-speed integrated circuit, metal-insulator semiconductor integrated circuit, light-emitting diode, integrated circuit testing, integrated circuit selection, integrated-circuit packaging process, high-frequency semiconductor, analog-signal processing, digital-to-analog conversion, semiconductor device analysis, analog-to-digital conversion, metal-oxide semiconductor material, integrated circuit assembly, charge-storage diode, analog signal, Boolean algebra, metal semiconductor field-effect transistor, photoelectric cell, thin-film integrated circuit, semiconductor diode, semiconductor device selection, photodiode, metal-insulator semiconductor material, microwave integrated circuit, linear integrated circuit, hybrid integrated circuit, high-frequency integrated circuit, field-effect integrated circuit, digital signal processing, semiconductor diffusion, current-mode logic, chip-on-board technology, central processing unit