Expert Details
Semiconductor Fabrication, Packaging, Laser Processing, Reliability, GaN, Power Electronics and Devices
ID: 730965
Israel
This expert is a Expert teaching VLSI design and processing at major universities since 1995. He regularly consults with high tech companies and supervises projects related to ASIC, FPGA design, testing and Failure Analysis. He understands the device physics and teaches them in his graduate and undergraduate classes. His Ph.D students continue to have a strong impact on the semiconductor industry as they have prominent positions in large and important semiconductor fabrication and design companies, including Intel, Apple and others. He has been working with industry around the globe and has made innovations with his physics of failure approach to reliability prediction. He works with packaging technologies as well as his students continue his legacy by studying circuit integrity and reliability of systems based on solder joint reliability and multiple failure mechanisms in the silicon devices themselves.
Reliability Consulting for Teradyne Corporation for three years implementing a corporation-wide reliability FRACAS system. Expert has lectured and been a consultant at Micron Corp. in Israel on reliability evaluation for Flash memory, worked on device burn-in and reliability prediction for Marvel, and worked with TTM department on qualification of devices using HTOL testing.
Education
| Year | Degree | Subject | Institution |
|---|---|---|---|
| Year: 1990 | Degree: Ph.D | Subject: Electrical Engineering and Computer Science | Institution: MIT |
| Year: 1987 | Degree: E.E. | Subject: Electrical Engineer | Institution: MIT |
| Year: 1986 | Degree: M.S. | Subject: Electrical Engineering and Computer Science | Institution: MIT |
| Year: 1984 | Degree: B.S. | Subject: Electrical Engineering | Institution: Union College |
Work History
| Years | Employer | Title | Department |
|---|---|---|---|
| Years: 2012 to Present | Employer: Undisclosed | Title: Professor | Department: Electrical Engineering Department |
Responsibilities:Teaching VLSI design and manufacturing, Device Reliability, Leading laboratory for VLSI Failure Analysis and Reliability Physics |
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| Years | Employer | Title | Department |
| Years: 2007 to 2012 | Employer: Bar Ilan University | Title: Professor | Department: Faculty of Engineering |
Responsibilities:Teaching VLSI design and manufacturing, Device Reliability, Leading laboratory for VLSI Failure Analysis and Reliability Physics |
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| Years | Employer | Title | Department |
| Years: 1995 to 2007 | Employer: University of Maryland | Title: Professor | Department: Materials/Mechanical Engineering |
Responsibilities:Microelectronics Reliability Curriculum development and several courses in Reliability. Head of Microelectronics Device Reliability |
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| Years | Employer | Title | Department |
| Years: 1990 to 1995 | Employer: MIT Lincoln Laboratory | Title: | Department: Solid State Electronics |
Responsibilities:Wafer Scale Integration Technology, Laser Linking and Fusing, Device Process technologies for wafer scale circuits. |
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Career Accomplishments
| Associations / Societies |
|---|
| Laboratory and Programmatic Affiliations: -Laboratory for Reliability of Advanced Microelectronic Systems, Ariel University -Laboratory for Reliable Electronic Systems at Ariel University, in collaboration with Israeli industry consortium and Bar Ilan University. -Founder and Faculty Advisor: Israel Electronics Manufacturers Working Group on Reliability, ILTAM -Assoc. Director, University Research Institute for Nanoscience and Nanotechnology at Tel-Aviv University -IEEE: Senior Member, nominated for IEEE Fellow (pending) |
| Awards / Recognition |
|---|
| Nanorun, distinguished lecturer and contributor, IRT-Saint Exupery Windows on Science researcher/lecturer, US Air Force ChipEx best paper/lecturer award Fulbright Senior Researcher. Lecturer IEEE Senior Member |
| Publications and Patents Summary |
|---|
| He has 6 patents, 56 refereed journal publications and 60 conference proceedings. |
Additional Experience
| Expert Witness Experience |
|---|
| Litigation experience began in in 1998 with a trial that ended up defeating a patent asserted against Cypress Semiconductor. This trial came down to expert's testimony being clearly more believable than the other expert and this decision was upheld through appeal where his testimony was clearly truthful, to the point and well understood by the jury and judges. Since then, his expertise in device processing has brought him many clients to this day where he has become expert in writing technical reports and standing dozens of depositions. Experience includes: - Inter-Parte Review defending patent owner. Engaged as Expert providing expert reports, depositions, expert analysis and testimony. Disposition: was resolved as NOT un-patentable while others are still pending. - Patent Infringement defending patent owner. Engaged as Expert providing expert reports, expert analysis and testimony. Disposition: Brought to successful settlement and non-institution of necessary claims. - Patent Infringement and validity. Engaged as Expert providing expert reports, expert circuit analysis and testimony, Claim chart construction and expert testimony covering 8 patents. Disposition: Brought to successful and beneficial settlement - Patent Infringement: Engaged as Expert providing expert reports, expert circuit analysis and testimony, Claim chart construction and expert testimony covering 8 patents. Disposition: Brought to successful and beneficial settlement. - Patent Infringement: Engaged as Expert providing expert reports, expert circuit analysis and testimony. Disposition: Client pulled out after institution at IPR - Patent Infringement: Engaged as Expert providing expert reports, expert circuit analysis and testimony, these cases successfully, were settled out of court. Disposition: Settled. - Patent Interference: Engaged as Expert for over 6 years supporting patent interferences cases involving laser processing in semiconductor devices. Numerous expert reports and depositions as well as interviews at the patent office and testimony. Disposition: Company was purchased by the competition. - Patent Re-Examination: Engaged as Expert writing expert testimony in defense of a patent in the semiconductor field. Disposition: Successful defense of patent. - Patent Infringement: Engaged as Expert providing expert reports and testimony, the case was successfully settled out of court. Disposition: Settled. - Patent Infringement: Engaged as Expert over 3 years providing numerous expert reports and trial testimony defending the company’s use of technology in alleged violation of a patent, which we proved in court to have been invalid. Disposition: We defeated the patent at trial and sustained on appeal. - Patent Infringement: Engaged as Expert providing hands-on consulting, expert testimony and reports relating to laser processing of silicon wafers for marking technology. Disposition: Settled. |
| Training / Seminars |
|---|
| Expert gives seminars on semiconductor device physics of failure and on advanced packaging technology. He has developed a unique method of reliability prediction based on combining multiple failure mechanisms into a comprehensive model that accurately predicts the reliability of an electronic system. Courses Taught in the Last 5 Years o Reliability Prediction based on Multiple Accelerated Life Tests – Hobbs, IEEE o Why Weibull, Why Not! – Hobbs, IEEE o VLSI Design – Ariel University (Advanced Undergraduate) o Reliability Engineering Fundamentals - Ariel University o Microelectronics Device Reliability – Ariel University o VLSI Analog (1 semester) and Digital VLSI (1 semester) Laboratories – Ariel University Courses or Curriculum Developed: o Reliability Engineering: Introduction to the physics of failure and statistical tools needed to understand fundamental physical processes that lead to failures. This course develops the basic mathematical underpinnings of lifetime acceleration models and approaches to analyzing data. o Electronic Device Reliability: Semiconductor device physics of failure, designed for graduate students with some background in semiconductor device operation in addition to having had core courses in reliability. This course incorporates the latest understanding of specific wear-out mechanisms. o Advanced Reliability Engineering: Specific failure modes present in mechanical and electronic systems are analyzed and brought to light in this course through real-world examples. |
| Marketing Experience |
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| The semiconductor industry is extremely competitive and technologies such as DRAM are quite volatile. Expert has worked in the Fuse technology for DRAM and SRAM devices and actively tracks the processing and design technologies around the globe. |
| Other Relevant Experience |
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| He has a knack for presenting physics in a clear and understandable way that allows juries and lawyers to assess the necessary innovation and get to the essential arguments in the intellectual property dispute. |
Fields of Expertise
application-specific integrated circuit, complementary metal-oxide semiconductor device, digital integrated circuit, field-effect integrated circuit, high-frequency integrated circuit, integrated circuit, integrated-circuit chip, integrated-circuit package, integrated-circuit packaging process, laser diode modulation, metal-insulator semiconductor integrated circuit, power semiconductor device, power semiconductor device new product development, power semiconductor device quality improvement, semiconductor device failure, semiconductor device failure mechanism, semiconductor device manufacturing, semiconductor device package, semiconductor device package reliability, semiconductor device physics, semiconductor device reliability, semiconductor device testing, semiconductor device thermal management, semiconductor material manufacturing, semiconductor material processing, semiconductor technology, semiconductor thermal oxidation, device physics, electronic circuit element testing, electronic device reliability, electronic device reliability improvement, electronic logic circuit, electronic packaging, electronic packaging technology, electronics nondestructive testing, electronics reliability testing, field-effect device, field-effect transistor, field-programmable gate array, first level packaging, integrated circuit assembly, integrated circuit testing, integrated-circuit built-in self test, integrated-circuit design, integrated-circuit manufacturing, integrated-circuit reliability, laser etching, programmable chip, electrostatic discharge protection, copper metallizing, electrostatic discharge implant, lift-off (semiconductor fabrication), mixed-signal integrated circuit, discrete semiconductor device, memory packaging, semiconductor wafer fabrication facility, electronic equipment heat transfer, semiconductor integrated processing, diode laser spectroscopy, electronics scan testing, semiconductor laser, flip chip, electronic equipment, electric-power conversion, integrated circuit selection, electronics radiation hardening, linear integrated circuit, integrated optoelectronics science, bipolar integrated circuit, amorphous semiconductor