Intellex Acquires Expert by Big Village

We're thrilled to announce that Intellex has acquired Expert by Big Village, effective March 22, 2024. This strategic move enhances our capabilities and strengthens our commitment to delivering exceptional solutions to our customers.

Stay tuned for more updates on how this acquisition will benefit our clients and experts.

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Expert Details

Semiconductor Devices, Testing and Product Engineering, Marketing and Administration

ID: 720281 California, USA

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Expert has spent most of his career in the semiconductor device and process technology areas. His experience is wide, with exposure to germanium and silicon discrete to large scale silicon integrated devices in the sub-micron regime. An area that is also of major interest to him is the optimization of process steps and integration, in order to achieve optimum device performance.

Expert has expertise in process modeling using supreme 4, and device modeling using Pisces 2b. His main emphasis has been on silicon devices for high voltage and high speed devices. Expert has modeled devices in the 0.55 micron length (CMOS). Expert has experience in total semiconductor processing including wafer cleaning, pre-treatments, oxidation, diffusion, implants, metallization, and passivation. He has worked with plasma and wet etching as well as photomasking.

Expert has been involved in developing process for isolation of devices. To do this, he has implemented different self-aligned technologies; under his guidance, the devices have low defect rates and low encroachment oxide isolation.

Expert has expertise in multi-level interconnect technologies; in fact, he was one of the early proponents of multi-level interconnect technology with planarization. He has experience in ARC, planarization via fill, and step coverage areas of interconnect technology, as well as SOG processing and contact issues.

Expert is experienced in silicon, oxide, nitride, and metal etch technologies for VLSI He also has background in applied material etchers, tegal etchers, drytek etchers, and lam etchers.

During his past employment, Expert has been responsible for the development of bipolar and biCMOS technology. He is well experienced in the device and integration problems of combining bipolar and CMOS. Expert has been awarded a number of patents in these fields.

This is one of Expert's strongest points. He has worked on improving FAB yield and final test yield of discrete devices to VLSI devices. He has excellent skills for identifying defects and causes of problems in this area, and solving them in the manufacturing environment.

Expert developed and patented an amorphous silicon diode for application with memory cells as load device. He also worked on deposition, doping, and passivation of amorphous silicon for vertical fuse technology.

Expert has had extensive experience in materials and characteristics of doped semiconductors. He has handled crystal growth and purification (float zone refining and doping) of germanium and silicon crystals. He has been involved in silicon material characterization for single crystal concentrator solar cell manufacturing.

Expert has extensive experience in different film depositions for peizoelectric crystal, capacitor, and semiconductor manufacturing. He has worked as a consultant to major equipment companies manufacturing deposition and etch equipment. He is familiar with microelectronic thin film applications.

Expert is knowledgeable of EEPROM and flash cells using electron tunneling phenomena in semiconductors. He has extensive background in the physics of tunneling.

Expert has been involved with manufacturing of semiconductors and electronic component products for over 20 years. He has expertise in equipment selection, optimization of layout, yield improvement, and manufacturability assessment.

Expert is knowledgeable of the technologies and devices currently used in medium and large scale semiconductor integration. He is familiar with the metal oxide semiconductor device form as the fundamental building block of both analog and digital circuits. He has been involved in characterization, modeling, manufacturing, and testing of these devices and circuits.

Expert has experience with integrated circuits and manufacturing from small scale to VLSI level. He has a wide range of experience in process integration to achieve the final results.

His experience in photovoltaics involves concentrator solar cell design, manufacturing, and testing. He worked primarily in concentration cell development for high-efficiency power generation.

Expert has done modeling work on TRAPATT and IMPAT diodes and microwave amplifiers. He also has some exposure to microwave ICs as a consultant.

Expert has experience in random access memory, including cell level, operation, manufacturing, and process. He has worked with bipolar, TTL and ECL memories, SRAM (MOS), DRAMS, and non-volatile memories.

He has been involved with memory cells using emitter coupled logic for high-speed bipolar and biMOS memory. He has patents in cell structures for ECL memories.

Expert has worked with bipolar junction transistors and Schottky and junction diodes. He has been involved in manufacturing, integration, and modeling of both standard bipolar and poly-emitter bipolar devices. He is also familiar with discrete high power and high voltage transistors and diodes.

Expert has worked on metal interconnection and dielectric planarization for interconnection. He has extensive knowledge of passivation methodologies. He has worked with barrier technologies for silicon interconnects.

Expert studied and implemented the use of various dielectric materials used in semiconductor manufacture and packaging as part of the IFI team investigating optimum interconnection and packaging issues.

Expert a background understanding of cell structures for non-volatile memories, problems of manufacture, reliability, testing, and yield issues in EPROM, EEPROM, and flash technologies. He developed a vertical fuse technology for metal to metal interconnection. He has extensive experience in manufacturing device technology and reliability testing of non-volatile devices.

As part of semiconductor technology and processing, Expert has been involved with optimization of doping processes using diffusion and implants. He has used rapid thermal processing.

He developed the EEPROM for IMP using their technology - proved the manufacturability and reliability.He was a consultant to EG & G - developed and implemented new high density technology for Infra red and optical sensors.He consulted for ITT, GA improving the breakage seen during process. He suggested handling and equipment modifications for brittle GAs wafers. He worked with Micro-Chip to eliminate the data loss due to process. He consulted on process development for EPRI/ Stanford concentrator Solar cell. He developed the first 26% efficiency cell.


Year Degree Subject Institution
Year: 1982 Degree: MS Subject: Electrical Engineering Institution: University of Michigan, Ann Arbor
Year: 1974 Degree: MBA Subject: General & Marketing Management Institution: Indian Institute of Management - Calcutta, India
Year: 1968 Degree: BSE Subject: Electronics and Communication Engineering Institution: University of Kerala

Work History

Years Employer Title Department
Years: 2000 to Present Employer: Undisclosed Title: President & CEO Department:
He is president of a Internet Router Chip start-up company.
Years Employer Title Department
Years: 1999 to 2000 Employer: Silicon Recognition, Inc Title: President Department:
He was responsible for company expansion.
Years Employer Title Department
Years: 1995 to 1999 Employer: DynaChip Corp. Title: Dir. Product and Test Engineering Department:
He was responsible for total product function with yield, packaging development, QC and testing.
Customer interaction for problem solving.
Years Employer Title Department
Years: 1990 to 1995 Employer: Elan Mictrosystems, Inc . Title: V.P. of Technology and Projects Department:
He was responsible for technology transfer to Japanese Fabs, and
technology development for products (EEPROM, EPROM and Flash).
Years Employer Title Department
Years: 1987 to 1990 Employer: Tactical Fabs, Incorporated Title: Director, Process Integration and Project Management Department:
He was responsible for technical project management and integration, process development & integration.
Years Employer Title Department
Years: 1986 to 1987 Employer: Advanced Micro Devices Title: Senior Marketing Engineer Department: Non-Volatile Memories
He did technical marketing for domestic, international and military areas.
Years Employer Title Department
Years: 1982 to 1986 Employer: Advanced Micro Devices Title: Sr. marketing Engineer Department: Non Volatile Memory
He was responsible for architecture, process and technology development & integration.
Years Employer Title Department
Years: 1977 to 1981 Employer: Kaduna Poly Title: Sr. lecturer Department:
He taught courses in electronics & communication.

International Experience

Years Country / Region Summary
Years: to Present Country / Region: Germany Summary: Worked with ITT semiconductors in Germany to improve their yield. Yield increased by 12% with changes implemented.
Years: to Present Country / Region: India Summary: Consultant to BHEL on new fab implementation.
Years: to Present Country / Region: Japan Summary: Consultant to NPC for CMOS technology & Non Volatile memory development, integration and qualification.
Years: to Present Country / Region: Sweden Summary: Consultant to ABB Haffo for yield improvement effort.
Years: to Present Country / Region: Japan Summary: Consulted with AKM on fab implementation and equipment selection.

Career Accomplishments

Associations / Societies
He is a member of IEEE.
Professional Appointments
He is a technical advisor to Isonics Ltd, a board member for Silicon Recognition, and a board member on Employer.
Publications and Patents Summary
He has over 28 patents in the areas of devices, architecture, packaging etc. He also has three publications.

Language Skills

Language Proficiency
Malayalam He is fluent in Malayalam.
Hindi He knows some Hindi.

Fields of Expertise

semiconductor technology, semiconductor device manufacturing, test engineering, semiconductor device, semiconductor processing equipment, semiconductor process modeling, semiconductor device modeling, semiconductor material processing, interconnection technology process development, planarization, multi-level metal interconnect, plasma etching technology process development, bipolar complementary metal-oxide semiconductor technology, bipolar integrated circuit, bipolar integrated circuit technology, semiconductor defect analysis, semiconductor quality improvement, amorphous semiconductor, amorphous silicon, doped semiconductor, semiconductor doping, electron-beam deposition, sputter deposition, vacuum deposition, vapor deposition, microelectronics thin-film application, electron tunneling, electronics manufacturing, field-effect device, transistor, insulated field-effect transistor, metal-oxide semiconductor field-effect transistor, large-scale integration, very large-scale integration, large-scale integrated circuit, monolithic integrated circuit, integrated circuit, photovoltaic cell, photovoltaic effect, microwave integrated circuit, random-access memory, emitter-coupled logic, junction transistor, semiconductor diode, semiconductor metallizing, semiconductor passivation, dielectric film, non-volatile memory, nonvolatile technology, ion implantation, wet etching, Industrial Fasteners Institute, wedge bonding, discrete semiconductor device, plasma damage, semiconductor device testing, integrated-circuit manufacturing, float zone single silicon crystal growth method, single crystal, silicon etching, plasma etching technology, electrically erasable programmable ROM, transistor-transistor logic circuit, semiconductor impurity material, complementary metal-oxide semiconductor device, metal-oxide semiconductor device radiation effect, semiconductor wafer decontamination, read-only memory, ion etching, semiconductor device analysis, negative metal-oxide semiconductor material, positive metal-oxide semiconductor material, medium-scale integrated circuit, ultralarge-scale integration, electronics circuit integration, thin-film magnetic property, passive electronic element, electronic device, photoelectric cell, resistor, radiation hardening, lead frame, semiconductor thermal oxidation, soldering material, semiconductor material, process optimization, phototransistor, ultraviolet lithography, metal passivation, optical microlithography, microwave amplifier, microlithography, metal-insulator semiconductor device, electronic logic circuit, field-effect transistor, evaporated film, epitaxy, environmental-stress screening, digital circuit, crystal growth, chemical vapor deposition, capacitor, avalanche diode

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