Expert Details
RFIC, AMS and ROIC Circuit Design; IP and Patents; System Design; New Business, SBIR and Proposals
ID: 732133
California, USA
He has knowledge of IC process development, characterization, and modeling. He has significant experience in obtaining new military, space, and commercial IC business, as well as obtaining funding for start-up activities. He has been responsible for technical oversight of large IC design teams (20-40 people). He can contribute creatively to the solution of difficult IC technical problems. Have 57 U.S. patents issued, 200-300 international issued patents, with 29 U.S. patents pending.
He is the author or co-author of 15 published conference and journal papers. He also has experience at the discrete analog / RF / mixed signal level for system analysis, link budget analysis, board level circuit design and layout. Experience in system design, architecture, and analysis.Experience in analog / mixed signal / RFIC packaging options - QFN, BGA, LCC, COB, MCM, hybrid, and package test.
Specialties: System Design/Architecture/Analysis/Block Specifications
New business development/capture
Winning proposals for small (SBIR Phase I and II) and large businesses
Product road maps
VC funding pursuits
technical due diligence for VCs, angel investors, and M&A
IP creation and protection
Client depostion
Technical lead for IC design groups and product development
AMS/RFIC Design
Chip/Circuit/System Architect
High speed, high performance ADC, Sample/Hold, ADC drvier amplifier, and DAC architectures
RF/AMS/SOC BIST/DFT architectures and methodologies
PLL and DDS
DIgitally programmable RF transceivers/SDR/GPS/cellular/wireless transceiver architectures
RF TxRx, optical TxRx, modulator driver, LDD, TIA
Flash Ladar, active/passive imaging ROIC
regulators, high voltage/high current switches, ATE electronics
SiGe BiCMOS, CMOS, SOI, bipolar, Complementary bipolar, GaAs, InP
Digital beamforming
Cadence tools - schematic capture, SPECTRE, layout review
solutions to production problems
Expert has led the development of analog / mixed signal / RF / custom high speed circuit efforts for commercial, military, and space markets for over three decades. He has also been a subject matter expert in these areas, and has been technical support for new business pursuits, including commercial chip developments for integrated circuit design houses, and product road maps for commercial, space, and military products. He has developed the technical ideas for winning SBIR Phase I and Phase II proposals for small companies.
He has also conceived system-on-a chip and novel integrated circuit solutions for proposals to government agencies in support of large military contractors. He has developed product business plans and product road maps for investment funding for start-up companies.He has created a large amount of intellectual property for clientele, and has performed intellectual property analysis for potential investment from venture capital firms, as well as for clients looking at possible merger & acquisition opportunities. He has performed general system analysis, as well as printed circuit board design and analysis.He has architected a large of number of circuit topologies that have been patented and put into production for the above markets. He is the owner of his own consulting business, and has over three dozen clients where he consults in a variety of areas. He has worked with many integrated circuit design teams to derive system level specifications, system level architectures, block level specifications, and block level circuit architectures
He has worked with design teams during the design process, reviewing circuit approaches, and has helped to define the required simulations to guarantee that the circuit blocks will meet the required specification. He has been involved in layout floor planning, as well as the review of the layouts. He has contributed to improving the block layouts to ensure that the parasitic extracted simulations maintain the performance of the circuit. He has been involved in characterization of fabricated integrated circuits, and work with the design team to correlate the measured results to the simulations. He has solved problems with hybrids that have obsolete integrated circuits and require creative solutions.
Extensive experience in high performance / high dynamic range analog mixed signal, custom digital, and RF integrated circuit design, layout, and test, from concept to production for commercial, military, and space IC products. Have experience developing system architectures and supporting system level link budget analysis. Have knowledge of IC process development, characterization, and modeling. Have significant amount of experience in winning new military, space, and commercial IC business, as well as obtaining funding for start-up activities. Technical oversight for large IC design teams (20-40 people). Have significant amount of proposal writing experience. Have ability to contribute creatively to the solution of difficult technical problems. Have 70 U.S. patents issued, 30 patents pending, and 200-300 issued international patents. Have experience at the discrete analog / RF / mixed signal board level design and layout and system analysis. Author or co-author of 15 published conference and journal papers. Also have experience at the discrete analog / RF / mixed signal level for system analysis, link budget analysis, board level
Specialties:
IP analysis / technical due diligence for M&A
IP portfolio management and creative contribution to new IP generation
Prior art searches and technical support for patent office action amendments
Perform simulations, review IP, and provide expertise in support of patent litigation
System Design/Architecture/Analysis/Block Specifications
New business development/capture
Winning proposals for small (SBIR Phase I and II) and large businesses
Product road maps
VC funding pursuits
Technical due diligence for VCs, angel investors, and M&A
IP creation and protection
Client deposition
Technical lead for IC design groups and product development
AMS/RFIC Design Chip/Circuit/System Architect
High speed, high performance ADC, Sample/Hold, ADC drvier amplifier, and DAC architectures
RF/AMS/SOC BIST/DFT architectures and methodologies
PLL and DDS
Digitally programmable RF transceivers/SDR/GPS/cellular/wireless transceiver architectures
RF TxRx, optical TxRx, modulator driver, LDD, TIA
Flash Ladar, active/passive imaging ROIC
regulators, high voltage/high current switches, ATE electronics
SiGe BiCMOS, CMOS, SOI, bipolar, Complementary bipolar, GaAs, InP
Digital beamforming
Cadence tools - schematic capture, SPECTRE, layout review
Solutions to production problems
Secret clearance
Client #1. Worked with a design team (10 designers) that had no previous experience designing any of the blocks of a particular high speed, high dynamic range circuit. Educated each member of the design team, and achieved first pass success with state-of-the-art performance. Client #2. Worked with experienced IC designer who was tasked with developing a commercial product, for the first time, to compete with a company who had a dominant presence in this product area for over 3 decades. I architected the overall circuit topology, and the part was fabricated, and with a metal mask, for a process issue, the performance was on-par with the competitor. The company was subsequently bought by the competitor. Client #3. Company had a need for a block function with a certain power target, but had no idea or experience how to implement it. Architected a low power version of a high speed circuit function that would allow the function to meet the power goal. Worked with designer to implement, and is key part of an existing commercial product.Client #4. Helped IC design house client propose, and win, a chip development. Architected the overall system solution, performed the system analysis, block specification, block circuit topologies, and was involved with the design team on the initial simulations of the overall circuit functions.Client #5. Client has a customer that requires the power of existing solution be cut significantly. I was asked to architect new solutions that are architecturally different from existing architectures to meet the power requirements.
Education
Year | Degree | Subject | Institution |
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Year: 1989 | Degree: Engineer's Degree | Subject: electrical engineering | Institution: USC |
Year: 1985 | Degree: BSEE | Subject: electrical engineering | Institution: UCLA |
Year: 1987 | Degree: MSEE | Subject: electrical engineering | Institution: UCLA |
Work History
Years | Employer | Title | Department |
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Years: 2006 to Present | Employer: Undisclosed | Title: Owner and Consultant | Department: Circuit Design and Wireless Technologies |
Responsibilities:Clients:Aerius Photonics Arete Associates Ball Aerospace & Technologies Brady Worldwide Inc. Dynamic Research Corp. DRS RSTA Inc. FBI FLIR Electro-Optic Components Hittite Microwave HRL InPhi Corporation IQ Analog Key2Mobile Kratos Defense Systems Linearchip Linear Microsystems Inc. Lockheed Martin Menara Networks Micrel Mobilitie MOSIS / ISI Nu-Trek Inc. Raytheon Red Dot Wireless Ridgetop Group Semtech SpaceMicro SYS Technologies Tangea Semiconductor Technoconcepts Teqnovations Teradyne Terocelo Treehouse Design Inc. Q3Web Wideband Wireless Ubidyne Wistron |
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Years | Employer | Title | Department |
Years: 2002 to 2006 | Employer: TelASIC Communications | Title: Founder / Director of Technology | Department: Data Conversion |
Responsibilities:Expert led the development of state-of-the-art data converters for the commercial cellular base station market. |
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Years | Employer | Title | Department |
Years: 1985 to 2002 | Employer: Raytheon | Title: Engineering Fellow | Department: Electronics |
Responsibilities:He served as technical lead for the development of integrated circuits for the military, space, and commercial markets. Company subject matter subject on RFIC / ROIC / AMS integrated circuits. He was a company-wide resource for new business pursuits. |
International Experience
Years | Country / Region | Summary |
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Years: 2006 to 2009 | Country / Region: Germany | Summary: He consulted for a start-up in Germany called Ubidyne. He was involved in reviewing, and providing enhancements, to the base line product. I would fly to Germany and spend a week at a time. I did this 2-3 times. The rest of the work was performed remotely. |
Career Accomplishments
Associations / Societies |
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IEEE |
Awards / Recognition |
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IEEE senior member |
Medical / Professional |
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IC Process Experience: CMOS, silicon / SiGe bipolar, silicon / SiGe BiCMOS, complementary bipolar, CBiCMOS, SOI, SOS, GaAs D-mode / E-mode MESFET, AlGaAs / InP HBT Education: UCLA • BS Electrical Engineering Summa Cum Laude • Most Outstanding Senior Electrical Engineering Student • MS Electrical Engineering USC Los Angeles, CA • Engineer’s Degree Electrical Engineering • PHD Candidate • Completed Thesis: “Nonlinear Error Correction for the Bipolar Canonic Cells.” • Designed, fabricated, and DC wafer probed amplifier circuits in MAXIM SHPi bipolar process to verify theory developed. |
Publications and Patents Summary |
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co-authored 15 journal and conference papers 65 issued US patents >30 US patents pending 300-400 issued international patents |
Fields of Expertise
bipolar integrated circuit, intellectual property, analog circuit design, application-specific integrated circuit, application-specific integrated circuit testing, intellectual property due diligence, intellectual property analysis, microelectronics science, microelectronic packaging, microelectronic assembly, microelectronics research and development, complementary metal-oxide semiconductor integrated circuit, integrated-circuit manufacturing, custom integrated circuit, silicon-on-sapphire integrated circuit, analog circuit simulation, SPICE simulation software, Cadence Design System, hybrid integrated circuit, hybrid microelectronic device, integrated circuit, integrated-circuit built-in self test, integrated-circuit chip, integrated-circuit design, mixed-signal integrated circuit, monolithic integrated circuit, radio frequency integrated circuit, very high-speed integrated circuit, circuit design, circuit analysis, legal litigation support, electronic packaging industry, electronic packaging technology, ceramic package testing, hybrid integrated circuit package, integrated-circuit package, electronic package thermal impedance, electronic packaging, packaging design review, package testing requirement, package testing