Expert Details
RFIC Architecture, Analog & Mixed-Signal IC Design, High-Speed ADC/DAC Systems, Semiconductor Patent Analysis, and Software Defined Radio
ID: 732133
California, USA
He has also conceived system-on-a chip and novel integrated circuit solutions for proposals to government agencies in support of large military contractors. He has developed product business plans and product road maps for investment funding for start-up companies.He has created a large amount of intellectual property for clientele, and has performed intellectual property analysis for potential investment from venture capital firms, as well as for clients looking at possible merger & acquisition opportunities. He has performed general system analysis, as well as printed circuit board design and analysis.He has architected a large of number of circuit topologies that have been patented and put into production for the above markets. He is the owner of his own consulting business, and has over three dozen clients where he consults in a variety of areas. He has worked with many integrated circuit design teams to derive system level specifications, system level architectures, block level specifications, and block level circuit architectures
He has worked with design teams during the design process, reviewing circuit approaches, and has helped to define the required simulations to guarantee that the circuit blocks will meet the required specification. He has been involved in layout floor planning, as well as the review of the layouts. He has contributed to improving the block layouts to ensure that the parasitic extracted simulations maintain the performance of the circuit. He has been involved in characterization of fabricated integrated circuits, and work with the design team to correlate the measured results to the simulations. He has solved problems with hybrids that have obsolete integrated circuits and require creative solutions.
Extensive experience in high performance / high dynamic range analog mixed signal, custom digital, and RF integrated circuit design, layout, and test, from concept to production for commercial, military, and space IC products. Have experience developing system architectures and supporting system level link budget analysis. Have knowledge of IC process development, characterization, and modeling. Have significant amount of experience in winning new military, space, and commercial IC business, as well as obtaining funding for start-up activities. Technical oversight for large IC design teams (20-40 people). Have significant amount of proposal writing experience. Have ability to contribute creatively to the solution of difficult technical problems. Have 70 U.S. patents issued, 30 patents pending, and 200-300 issued international patents. Have experience at the discrete analog / RF / mixed signal board level design and layout and system analysis. Author or co-author of 15 published conference and journal papers. Also have experience at the discrete analog / RF / mixed signal level for system analysis, link budget analysis, board level
Specialties:
IP analysis / technical due diligence for M&A
IP portfolio management and creative contribution to new IP generation
Prior art searches and technical support for patent office action amendments
Perform simulations, review IP, and provide expertise in support of patent litigation
System Design/Architecture/Analysis/Block Specifications
New business development/capture
Winning proposals for small (SBIR Phase I and II) and large businesses
Product road maps
VC funding pursuits
Technical due diligence for VCs, angel investors, and M&A
IP creation and protection
Client deposition
Technical lead for IC design groups and product development
AMS/RFIC Design Chip/Circuit/System Architect
High speed, high performance ADC, Sample/Hold, ADC drvier amplifier, and DAC architectures
RF/AMS/SOC BIST/DFT architectures and methodologies
PLL and DDS
Digitally programmable RF transceivers/SDR/GPS/cellular/wireless transceiver architectures
RF TxRx, optical TxRx, modulator driver, LDD, TIA
Flash Ladar, active/passive imaging ROIC
regulators, high voltage/high current switches, ATE electronics
SiGe BiCMOS, CMOS, SOI, bipolar, Complementary bipolar, GaAs, InP
Digital beamforming
Cadence tools - schematic capture, SPECTRE, layout review
Solutions to production problems
Secret clearance
Education
| Year | Degree | Subject | Institution |
|---|---|---|---|
| Year: 1989 | Degree: PhD Candidate | Subject: Electrical Engineering | Institution: University of Southern California |
| Year: 1987 | Degree: MSEE | Subject: Electrical Engineering | Institution: UCLA |
| Year: 1985 | Degree: BSEE | Subject: Electrical Engineering | Institution: UCLA |
Work History
| Years | Employer | Title | Department |
|---|---|---|---|
| Years: 2021 to Present | Employer: Undisclosed | Title: Consultant | Department: |
Responsibilities:• Reviews schematics, reverse engineering reports, and claim charts for patent infringement analysis in semiconductor and memory technologies.• Evaluates patent portfolios for infringement and monetization potential. • Supports claim mapping, portfolio review, and technical diligence in semiconductor and automotive SiC technologies. |
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| Years | Employer | Title | Department |
| Years: 2006 to Present | Employer: Undisclosed | Title: Owner & Consultant | Department: Circuit Design and Wireless Technologies |
Responsibilities:• Provides semiconductor architecture consulting across RFIC, AMS, ADC/DAC, optical transceiver, SDR, and digital beamforming technologies.• Performs IP analysis, prior art searches, infringement and invalidity analysis, and litigation support. • Develops system architectures and product roadmaps. • Supports SBIR/STTR proposals and captures government R&D funding. • Conducts technical due diligence for venture capital, angel investment, and M&A transactions. |
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| Years | Employer | Title | Department |
| Years: 2009 to 2011 | Employer: Aerius Photonics | Title: Senior Systems Engineer | Department: |
Responsibilities:• Led ROIC architecture development.• Secured approximately $2.6M in SBIR funding. • Led multiple Phase I and Phase II proposal efforts for federal agencies. |
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| Years | Employer | Title | Department |
| Years: 2008 to 2009 | Employer: Menara Networks | Title: Director of ASIC Development | Department: |
Responsibilities:• Contributed to Electronic Dispersion Compensation IC development for optical communications.• Participated in high-speed transceiver architecture development. |
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| Years | Employer | Title | Department |
| Years: 2002 to 2006 | Employer: TelASIC Communications | Title: Founder / Director of Technology | Department: Data Conversion |
Responsibilities:• Technical lead for high-performance ADC and DAC IC products for cellular base stations.• Delivered production ICs for commercial base station deployment. |
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| Years | Employer | Title | Department |
| Years: 1985 to 2002 | Employer: Hughes Aircraft / Raytheon / Radar Systems Group | Title: Engineering Fellow | Department: |
Responsibilities:• Led RF transceiver, ADC, DAC, and ROIC IC development.• Supported new business pursuits in military, space, and commercial IC applications. • Led IRAD programs across multiple semiconductor process technologies. • Led and contributed to development of high-performance data converters, RF front-end ICs, GPS receiver ICs, radar ICs, and high-speed digital ICs. • Worked across CMOS, BiCMOS, SiGe, SOI, bipolar, and III-V technologies. |
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Additional Experience
| Expert Witness Experience |
|---|
| Expert has 10+ years providing consulting and expert services in numerous federal district court and International Trade Commission matters involving semiconductor, RFIC, image sensor, LED, memory transistor, driver circuitry, CAD tools, and software-defined radio technologies. Experience includes: • Preparation of expert reports and sworn declarations in semiconductor patent litigation matters. • Involvement in multiple ITC investigations concerning semiconductor devices and layered dummy fill technologies. • Patent infringement and invalidity analysis across RFIC, memory, image sensor, optical module, and LED process technologies. • Claim chart preparation and technical analysis for both plaintiffs and defendants. • Participation in mediation and settlement proceedings. • Service as both expert witness and fact witness in contract dispute and trade secret matters involving SDR development. |
Career Accomplishments
| Associations / Societies |
|---|
| Senior Member, IEEE |
| Awards / Recognition |
|---|
| • Awarded medal for service in technical consulting related to national security matters • Secured multiple Phase I and Phase II SBIR/STTR awards across federal agencies |
| Publications and Patents Summary |
|---|
| • 65 issued US patents, ~30 US patents pending, and 300+ issued international patents. Patent portfolio contributions include RF transceivers, ADC/DAC architectures, ROICs, digital beamforming systems, optical communications ICs, and mixed-signal SoCs. • Co-authored numerous journals, technical white papers, conference papers, and application notes in RF and data converter domains. • Delivered technical webinars and internal engineering presentations. |
Fields of Expertise
bipolar integrated circuit, intellectual property, analog circuit design, application-specific integrated circuit, application-specific integrated circuit testing, intellectual property due diligence, intellectual property analysis, microelectronics science, microelectronic packaging, microelectronic assembly, microelectronics research and development, complementary metal-oxide semiconductor integrated circuit, integrated-circuit manufacturing, custom integrated circuit, silicon-on-sapphire integrated circuit, analog circuit simulation, SPICE simulation software, Cadence Design System, hybrid integrated circuit, hybrid microelectronic device, integrated circuit, integrated-circuit built-in self test, integrated-circuit chip, integrated-circuit design, mixed-signal integrated circuit, monolithic integrated circuit, radio frequency integrated circuit, very high-speed integrated circuit, circuit design, circuit analysis, legal litigation support, electronic packaging industry, electronic packaging technology, ceramic package testing, hybrid integrated circuit package, integrated-circuit package, electronic package thermal impedance, electronic packaging, packaging design review, package testing requirement, package testing