Expert Details
Electronics Reliability and Testing, Electronics Packaging Semiconductor Packaging, Patent Analysis
ID: 108191
Maryland, USA
Expert initiated a program for the development of a standardized methodology of product development, laying emphasis on microelectronic device reliability. The courses he teaches on microelectronic device reliability are attended by many companies in the field of electronics. The concepts learned in Expert's courses have proven to achieve significant improvements in the reliability of microelectronic products.
Expert has applied his expertise in electronics reliability to develop physics-of-failure based test methodologies for qualification and quality conformance testing of microelectronic devices and packages. Based on his work, NASA now requires that a justification be provided for electronics reliability test methodologies to show that they are relevant and do not induce harm to the product.
Over the course of his career, Expert has modeled solder joint fatigue damage for surface mount and plated-through hole components. He has analyzed the inelastic strain history in solder fatigue specimens (designed by NASA and UNISYS engineers) for comparing the low-cycle fatigue properties of different solder compositions under thermal cycling. The models were then implemented into the CALCE software and are now used by General Dynamics and Rockwell International for estimating PCB solder life under combined thermal and vibration conditions and by Litton for estimating the reliability of plated-through holes and vias.
Expert developed the Computer Aided Life Cycle Engineering (CALCE) and the Computer Aided Design of Microelectronic Packages (CADMP 2) software products. CADMP 2 is a set of integrated software programs used for modeling, simulation, and assessment of integrated circuits, hybrids, and multichip modules. CALCE is a set of integrated software programs used for the modeling, simulation, and assessment of printed wiring board assemblies. These two software tools have been used by a number of electronics companies, some of which are members of the CALCE EPRC consortium, to model, simulate, and assess package reliability.
He developed the first Reliability and Maintainability Computer Aided Design (RAMCAD) methodology as part of the Office of the Secretary of Defense program, the Institute for Defense Analyses RAMCAD program, and the Lockheed-Georgia RAMCAD program. As an indicator of his success, his research papers led to the development of RAMCAD software by more than 10 commercial companies.
Expert's expertise in electronics packaging comes from his unique background that combines strategic planning, research, education, management, and technology transfer. Besides founding two companies, he created a national center for research into electronic packaging as part of the University of Maryland. This center (CALCE Electronic Packaging Research Center) is funded by over 28 companies and government agencies, all interested in the design and development of cost-effective and reliable electronics products. Expert can provide insight into future plans for competing in the global market (including involvement in the military-government market) and how clients should plan to compete (or unite) with the Asian and European communities. He can advise clients on their current and planned methods for design and development, manufacturing processes, tools, the role of military-government standards, and the role of offshore manufacturing and acquisition.
Education
Year | Degree | Subject | Institution |
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Year: 1982 | Degree: PhD | Subject: Engineering Mechanics | Institution: University of Wisconsin, Madison |
Year: 1979 | Degree: MS | Subject: Engineering Mechanics | Institution: University of Wisconsin, Madison |
Year: 1978 | Degree: MS | Subject: Electrical Engineering | Institution: University of Wisconsin, Madison |
Year: 1976 | Degree: BS | Subject: Acoustics | Institution: University of Wisconsin, Madison |
Work History
Years | Employer | Title | Department |
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Years: 1985 to Present | Employer: Undisclosed | Title: Founder and Director | Department: |
Responsibilities:Available upon request. |
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Years | Employer | Title | Department |
Years: 1988 to 1990 | Employer: Ramsearch, Inc. | Title: Vice President | Department: |
Responsibilities:Available upon request. |
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Years | Employer | Title | Department |
Years: 1983 to Present | Employer: Undisclosed | Title: Faculty | Department: |
Responsibilities:Available upon request. |
International Experience
Years | Country / Region | Summary |
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Years: to Present | Country / Region: Asia | Summary: Expert has experience in strategic planning with various foreign government agencies and industries in Japan, Taiwan, Malaysia, Singapore, Indonesia, and India. He has visited each of these countries many times over the past 10 years (recently concluded a 7-week tour of Malaysia, Taiwan, and India for the Army and the United Nations) and is currently part of the US Government (National Science Foundation) Japanese Technology Evaluation Center assessment group. |
Career Accomplishments
Associations / Societies |
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Expert is a Fellow of the Institute of Electrical and Electronics Engineers (IEEE), a Fellow of the American Society of Mechanical Engineers (ASME), and an Associate Fellow of the American Institute of Aeronautic Association (AIAA). He is a senior member of the Institute of Environmental Sciences (IES). He also holds memberships with the International Microelectronics and Packaging Society (IMAPS), the Institute for Interconnecting and Packaging Electronic Circuits (IPC), and the American Society of Materials International (ASM). |
Licenses / Certifications |
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PE |
Professional Appointments |
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Currently, Expert is Chief Editor of Microelectronics and Reliability. He is Associate Editor for several publications, including IEEE Transactions on Electronic Components, Packaging, and Manufacturing Technologies; the International Microelectronics Journal; and the SAE Journal of Reliability, Maintainability, and Support ability. National Academy of Science/Engineering (NAE/NAS) Committees (invited to participate): Committee for reliability growth; Committee to investigate printed circuit board manufacturing in the U.S.; Committee to examine research needs in materials engineering; Committee to investigate automotive sudden acceleration and reliability (gave presentation but declined to participate). |
Awards / Recognition |
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HONORS AND AWARDS: 59 to date. More information available upon request. |
Publications and Patents Summary |
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26 books on electronics and reliability over 400 publications over 100 industry courses 3 patents |
Additional Experience
Expert Witness Experience |
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On multiple law cases; Consultant on 186 cases to date. More information and specifics available upon request. Expert for Congressional Investigations: Committee on Energy & Commerce to investigate automotive reliability issues: Toyota sudden acceleration; and GM ignition – air bag recalls and NHTSA responses FDA Expert: Taught reliability and aided FDA in assessing the reliability capability maturity assessment of manufacturers of medical devices, the techniques used to qualify devices, and medical device reliability and safety. |
Training / Seminars |
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Provides training and courses on reliability, electronics supply chain management and risk management |
Fields of Expertise
electronic device reliability, integrated-circuit reliability, microelectronic device reliability improvement, electronics reliability testing, printed-wiring board reliability, semiconductor device package modeling and simulation, electronic packaging industry, integrated-circuit package design, semiconductor device testing, semiconductor device package reliability, semiconductor device package, solder joint failure analysis, solder joint analysis, solder testing, computer-aided design software, electronic assembled device reliability, electronics test equipment, microelectronic device failure analysis, microelectronic device, printed-wiring board assembly process, solder behavior, electronic-device-component life-prediction methodology, printed-wiring board plating process, printed circuit industry, solder wetting, semiconductor device reliability, multichip module packaging process, printed-wiring board fabrication, solder joint failure, surface-mount solder joint reliability, solder joint reliability, surface-mount solder joint, electronic-component environmental protection, computer-aided design, printed wiring industry plating process, printed-wiring board, printed circuit board, semiconductor device packaging process, semiconductor device manufacturing, strategic planning, hybrid integrated circuit