Expert Details
Software Development & Intellectual Property
ID: 735849
California, USA
Expert is actively consulting and assisting clients with the successful design and delivery of software systems and services. In addition to his consulting work, he has collaborated with a diverse range of companies, including Nortel Networks, Surromed, Incyte Genomics, Weathernews, Tibco, Canon, ETAK, FXD/Telerate, Aspect Development, Quickturn Design, Zycad, Mindcraft, Diasonics, Engineering Data Express, Daisy Systems, Ensco, OceanRoutes, Rolm, and Computer Sciences Corporation.
Expert has served as an Expert Witness for over 25 years, providing litigation support in software intellectual property matters, such as patents, trade secrets, copyrights, software business practices, and other issues requiring application software analysis. He has also imparted his knowledge through teaching roles at San Jose State University, Foothill College, College of San Mateo, City College of San Francisco, and Brandeis University.
His specialties include applications software architecture and implementation, with particular expertise in algorithms, relational database management systems (RDBMS), graphical user interfaces (GUI), bioinformatics, electronic design automation, and many other application areas.
Education
Year | Degree | Subject | Institution |
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Year: 1974 | Degree: PhD | Subject: Theoretical Physics | Institution: Brandeis University |
Year: 1968 | Degree: MA | Subject: Physics | Institution: Brandeis University |
Year: 1966 | Degree: BS | Subject: Physics | Institution: City College of New York |
Work History
Years | Employer | Title | Department |
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Years: 1997 to Present | Employer: Undisclosed | Title: President / Consultant & Expert Witness | Department: |
Responsibilities:- Consultant and Expert Witness in software intellectual property matters -- patents, trade secrets, copyright, DMCA, business practices, contract disputes, etc.- Strengths in applications, algorithms, relational database systems, graphical user interface. - Software architecture and implementation across a wide variety of applications areas. |
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Years | Employer | Title | Department |
Years: 1995 to 1997 | Employer: TIBCO Inc. | Title: Senior Member of the Technical Staff | Department: |
Responsibilities:- Technical lead of a group of 5 engineers on an oil company asset management and trading system. Managed relations with the client’s technical staff.- Enhanced the Sybase schema and X11/Motif interface and did maintenance programming. - Designed and implemented a configurable report layout language, including a lex/yacc parser and an interpreter of the parsed code. Negotiated features of the language with the client. - Development environment included SunOS, C, X11/Motif, lex, yacc, Sybase and TIBCO-specific tools. |
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Years | Employer | Title | Department |
Years: 1993 to 1995 | Employer: Quickturn Design Systems | Title: Staff Engineer | Department: |
Responsibilities:- Group leader for parsers group, responsible for all Enterprise, Mars, and Quest product netlist parsers (Verilog, TEGAS and variants, EDIF, BDLS, etc.).- Trouble shooting, performance enhancement and bug fixing for the Enterprise product’s netlist database and the several parsers that feed it. Likewise for the Mars and Quest software products. - Design and implementation of a Verilog front-end for the Quest product, including X11/Motif GUI (using TeleUse), using an object-oriented database (Objectivity) and an Oryx grammar front-end. Managed relationship with third-party supplier of frontend tools used in the Verilog import program. - Design and implementation of an incremental import capability (ECO) using a common software layer for all import programs. - Languages used were ANSI C and C++ on SPARC-10’s; tools include Purify, Quantify and ObjectCenter. Code was also ported to Solaris and to RS6000’s and HP9000’s. |
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Years | Employer | Title | Department |
Years: 1992 to 1993 | Employer: ViP RunTime Group | Title: Project Lead | Department: |
Responsibilities:- Project leader of a group of 5 engineers writing the run-time support software for a hardware VHDL behavioral simulator. This includes design partitioning among multiple processors per board and multiple boards per simulator, symbol table creation and manipulation, downloading of the simulation code and the run-time kernel to the target hardware, text and file i/o support, and support for debugging (breakpoints, trace, browsing). Responsible for the Browser subsystem.- Work involved coordination with the compiler and hardware groups at Zycad, as well as with partner companies (including Synopsis, Cadence, Dazix, Vantage, and others) who provide the simulation front end to ViP software. ViP (VHDL Instruction Processor) was a new product, introduced at DAC 92. Development environment was Sun Sparcs, Unix, ANSI C (gcc), as well as Mips for embedded code. Host side software will also be ported to RS6000, HP/Apollo, and other engineering workstations. |
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Years | Employer | Title | Department |
Years: 1990 to 1992 | Employer: FXD/Telerate | Title: Principal Software Engineer | Department: |
Responsibilities:- Designed and implemented the second generation DealMaker product, a workstation-based graphical tool for Foreign Exchange traders to enter their dealsand to maintain their positions in the various currencies in which they deal. Other functions are maintenance of real-time exchange rates, credit limits, and other financial information. Computing environment was C under UNIX with X-windows and Motif as the graphical user interface, on SPARCstations and IBM RS6000’s, using the Sybase RDBMS system. - Developed a graphical user interface (X-Windows/Motif) to an analytics package and instrument history database, providing simple user control over the creation of new transformed (filtered) instruments, their real-time tracking, summary information, and their deletion. This package allows financial analysts to define and save time histories and analyses of any available quantities of interest. - Worked on graphical (X-Windows/Motif) and algorithmic extensions to the quoteList application, which allows users to configure a window displaying real-time information on the fields of interest of particular record based instruments, and to set up alert/alarm conditions when these values cross some bound. |
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Years | Employer | Title | Department |
Years: 1986 to 1990 | Employer: ETAK | Title: Senior Software Engineer | Department: |
Responsibilities:- Was code designer and sole implementor of ETAK’s “Zero-Track” database format for CD-ROM and workstation applications, including Geocoding, Navigation, and Fleet Management Systems applications. This highly compressed (roughly 20 to 1 over the source data) database format is designed for speed of access in real-time applications in CPU and memory constrained environments.- Created a high resolution workstation and interactive editor for cartographic applications. Hardware was based on an IBM-AT clone (under both MS-DOS and several versions of UNIX) with a high resolution graphics card and terminal, using a VAX (under VMS) as a high speed file server. Software included VAX communication, user interface, algorithms, graphics, and database design. Language used was C. - Wrote the low level graphics driver software and the upper application levels for the graphics applications. The device driver was written in C under MS-DOS using a shared (dual ported) memory model. - Worked on data integrity programs for the cartographic database (both topological integrity and internal database integrity). Worked on various transformation and compression programs for the cartographic database, taking it from the format used for data entry to the format used in the digital cassette tapes and CD-ROM in the ETAK Navigator and Map WorkStation. Extended the capabilities of these systems. - Enhanced HP plotting software to deal with new features in the database. - Participated in the design and implementation of the second generation digital cartographic system (MapEngine), including an interactive graphics editor. - Provided customer support related to OEM programming using the MapEngine. - Ported a large set of VAX/VMS programs to run under XENIX on a 386-based PC and under UNIX on a Sun 386i workstation. This work involved emulating and/or replacing VAX RMS indexed files and writing code that would conditionally compile and run efficiently and correctly on all three platforms. |
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Years | Employer | Title | Department |
Years: 1982 to 1987 | Employer: DAISY Systems Corporation | Title: Senior Software Engineer and Group Leader | Department: |
Responsibilities:- Algorithm design, implementation, and documentation for the Gatemaster project. This involved providing software (and graphical) tools for the LSI and VLSI design engineer to go from the schematic to actual component layout and interpin routing on gate arrays.- Designed a text syntax for presenting gate array connectivity and layout information from the Gatemaster data base to chip manufacturers, helped negotiate its acceptance by a major semiconductor company, and implemented the program (MAKE) which interrogates the data base and produces the file. Also worked on intercomputer communications protocols for the data transfer process and debugging the entire system from front to back. - Created and implemented a tool which increased the success rate of the automatic routers for gate array net interconnections. This tool not only significantly increased the number and fraction of nets routable to completion but also immediately indicated unroutable chips before any time is spent trying to route them, thus saving the design engineer many hours of wasted labor. - Worked on an automatic/interactive placement tool for gate array layout based on a force relaxation model for constructive initial placement. Adapted it from some models in the literature, designed its interface with the user and with the Gatemaster data base, its internal data structures, and the details of its implementation. - Project leader, designer, and implementor of a placement improvement system for gate arrays based on component interchange algorithms with user-selectable metrics and component selection criteria. - Project leader of a group of senior and junior level system analysts addressing the issues of placement on gate arrays (CAD/CAE), providing technical supervision, coordination, and training. Informally worked with junior (and new) programmers, doing some technical training and supervision. - Group Leader of a group of several senior level system analysts addressing the issues of hardware acceleration of semi-custom chip component placement algorithms, including design and implementation of computationally intensive advanced algorithms to be implemented in microcode, systems embedding, and a user friendly high level interface to the design engineer. - Work in the interactive editor group for a high-level correct-by-construction editor for full custom VLSI chip planning and layout. - Member of a team designing and implementing a layout verification package for fullcustom VLSI chips to be integrated with the Chipmaster. Package included electrical rules checking, device and net recognition, layout versus schematic checks, layout parameter extraction, interface to schematic capture systems, SPICE simulator, and digital system simulators; user interface, data structures and algorithms. - Computers used were the Intel Microprocessor Development System for the 8086, and the DAISY Logician (an 8086, 80286, or 80386 based engineering workstation) with MAESTRO and DAISY-DNIX operating systems; languages used were PL/M-86, C, and Metaware PASCAL. |
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Years | Employer | Title | Department |
Years: 1979 to 1982 | Employer: ENSCO | Title: Staff Scientist | Department: Ocean Systems and Sciences Division |
Responsibilities:- Lead investigator in applying passive underwater acoustic detection and estimation procedures to multi-sensor target localization.- Conducted studies on statistical properties of acoustic threat signatures with respect to optimal coherent processing to improve detection and parameter estimation. - Participated in large-scale real-time experiments which led towards very wide area coherent surveillance. - Participated in the design and production of a new surveillance architecture employing time sharing mainframes (PDP-10s), minicomputer control and communications processors (PDP-11/70s), and high speed array processors (AP-120Bs). - Conducted studies on causal measurement space clustering of cross coherence results for acoustic source detection, localization, and tracking. - Constructed a simulation system for generating realistic controlled random signals in noise and used it to investigate several alternative detection techniques, their false alarm statistics, performances, and parameter optimization. - Designed and implemented user-friendly operator interfaces for a number of signal processing modules. Designed and implemented the host-side software for several signal processing modules. These projects involved using multi-process and multicomputer communications systems, partitioning tasks on the minicomputers used to function properly in a heavily overlaid environment, and interacting with programs and data on a hosted array processor. - Used a generalized data base package to implement task specific multi-keyed writers and readers for real-time experiment support and off-line research support. - Technical writing of scientific research papers, final reports, system user manuals, proposals, and presentation of some of these at technical meetings and symposia, and directly to the Government sponsor. - Computers used were PDP-10 under TENEX, PDP-11/70 under RSX-11M+, FPS AP-120B array processor hosted by the PDP-11/70; languages used were FORTRAN 4, FORTRAN 10, and FORTRAN IV Plus. |
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Years | Employer | Title | Department |
Years: 1976 to 1979 | Employer: OceanRoutes | Title: Project Manager | Department: Research and Development-- Environmental Sciences Division |
Responsibilities:- Project Manager for development of spectral wave model for U.S. East Coast, and for in-house quality control program for Alaskan and North Sea spectral wave models.- Designed and implemented a climatological vessel response simulation system, including weather driver and output statistical analysis routines. - Conducted studies on and implemented NYU-type and wave-wave-interaction-type wave science for in-house wave models; wave refraction and shoaling; air sea temperature difference as it affects wave generation; hindcast studies; multi-plate grid systems for large area wave models. - Responsible for computer operating systems and model integrity for Alaskan, North Sea, and East Coast wave models. - Designed and developed a system for the semi-automatic and rapid generation of site-specific spectral wave models and their operating systems. - Created and refined an algorithm for the optimum weather routing of ships. - Supervised student aides and junior programmers on a continuing basis, and groups of programmers on a project basis. - Computers used were GE Time Sharing System, Data General ECLIPSE C/330 under AOS and NOVA 840 under mapped RDOS; languages used were FORTRAN IV and FORTRAN5, and some use of GESIMTEL (a GPSS-like language). |
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Years | Employer | Title | Department |
Years: 1976 to 1976 | Employer: Various Universities | Title: Professor | Department: |
Responsibilities:Part-time instructor of Physics. |
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Years | Employer | Title | Department |
Years: 1974 to 1976 | Employer: Computer Sciences Corporation - NASA Ames Research Center | Title: Member of Technical Staff | Department: |
Responsibilities:Work involved programming and running real-time simulations of aircraft and guidance systems in a state-of-the-art system with a pilot in the loop, using digital and analog computers, motion, visual, and sound systems; also conducting independent analyses and research to further clarify or upgrade the modeling techniques and software. Computers used were EAI 8400, XDS Sigma 7 and 8; languages used were FORTRAN IV and Xerox Extended FORTRAN IV. |
Career Accomplishments
Associations / Societies |
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IEEE Senior Life Member IEEE - Consultants' Network of Silicon Valley Forensic Expert Witness Association (FEWA) Professional and Technical Consultants Association (PATCA) American Physical Society (APS) American Association for the Advancement of Science (AAAS) |
Licenses / Certifications |
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California Community College Credential: Astronomy, Physics, and Mathematics. Certified by S.A.F.E. Corporation in the use of the CodeSuite software analysis tool set in intellectual property litigation. |
Awards / Recognition |
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Who’s Who in America Who’s Who in the West Who’s Who in California Who’s Who of Intellectuals Personalities of the Americas Men of Achievement International Leaders of Achievement International Directory of Distinguished Leadership Five Thousand Personalities of the World The International Who’s Who of Intellectuals Who’s Who of Emerging Leaders in America International Who’s Who of Professionals The Select Guide to Information Technology Executives Strathmore’s Who’s Who Registry (2 years) Research grant, Hebrew University, Jerusalem Research fellowship, Brandeis University Teaching assistantship, Brandeis University New York State Regents College Teaching Fellowship for Beginning Graduate Study (3 years) Recipient, New York State Regents Scholarship (4 years) Nominee, Woodrow Wilson Fellowship Member, Sigma Alpha, honor service society, CCNY (2 years) |
Publications and Patents Summary |
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Patents (co-inventor): 4 Co-inventor patents applied for by Incyte Genomics: 114 Publications and reports: 69 |
Additional Experience
Expert Witness Experience |
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Engaged 58 times as an expert, both for Plaintiffs and Defendants. Written 26 expert reports, deposed 12 times, testified once in Federal Court, once in State Court, and twice at JAMS hearings. |
Language Skills
Language | Proficiency |
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English | Fluent |
German | Basic |
French | Basic |
Hebrew | Basic |
Spanish | Basic |