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Expert has designed a digital press having the lithographic performance of photo gravure, but able to stream continuous data for variable printing. The performance includes 2400 dpi resolution, 200 fpm web speed, and 48-inch wide print dimension. The press has no optical elements such as the lasers and photo-conductive drums used in electrophotographic processes. The design employs voltage traveling waves that image toner, one particle at a time, using chemical dry toner (polymerized toner) having a spherical shape. The design leverages integrated circuit driver chips mounted on a writing head, and there are over 100,000 independent micro print engines operating in parallel.

Expert has designed a new methodology for solder-free electronic packaging and assembly, for integrating multiple semiconductor components into 3D electronic systems or modules or subsystems. The modules can include stacked chips, including new methods for testing the miniaturized assembly, as well as new cooling methods involving chilled water circulating in copper cooling channels. The methodology is supported by several issued patents and over 20 additional patents in progress.

Expert learned the art of patent writing from the late Aldo Test, an icon in Silicon Valley patent history. He has authored over 30 patents, and recently sold a small group of patents to a large Asian manufacturer for $150,000. He has developed a methodology for leveraging provisional patents as a means to test marketability, thereby controlling costs of large patent portfolios.

Expert has invented a novel structure for an improved low-k dielectric material for semiconductor wafer manufacture. By performing an extra mask step, a dielectric constant of 1.9 is achievable in 2008. The International Technology Road Map for Semiconductors (ITRS) has indicated a critical need for such low-k dielectric materials, and this design could provide a supporting solution out to 2015. The novel structure includes a binary combination of existing materials, and overcomes the limitations of each.

Expert has invented two different types of flip chip connectors. The first is a pillar-in-well connector that can support 80 micron pitch, in assemblies that can be easily tested and reworked. This connector can provide almost zero insertion force, by providing a liquid conductive ink in the wells; this solution can be leveraged for wafer level testing of microprocessors for example, having over 350,000 simultaneous probe points on a 300 mm wafer. The second flip chip connector supports solder-free assembly, and utilizes an elastic columnar element. Expert has consistently emphasized the fundamental performance of rework, for locating and replacing defective chips in a complex assembly.

Expert has invented a novel approach for cooling semiconductor assemblies, particularly for servers, supercomputers, and data centers. He has described a stacked architecture having integrated cooling channels; the channels are formed using copper substrates employing well known and trusted methods. By providing 5 liters/min of chilled water, 20,000 W of heat can be extracted. Peak junction temperatures can be held to 40 degrees Centigrade for example, for improved reliability and increased transistor speed.

Expert has invented a new form of Built In Self Test (BIST) for the system level. By providing a socketed FPGA test chip in the integrated assembly, functional testing at the system level can be accomplished at full speed and full power. The result can be superior to functional testing performed by million dollar testers, yet can be performed at low cost. The test chip accepts streaming data from the system bus, and can detect any deviation during a full work out of the system.

He assisted attorneys at Lowrey, LLP in an international patent litigation case involving companies in the United States, Europe, and Korea. He analyzed over 100 patents, creating claim charts for each one. He performed tear downs and testing on a television set, a computer monitor, and multiple OEM displays.For ESL, a subsidiary of TRW, he performed systems engineering services on the Trailblazer program, a ground-based reconnaissance system involving signal intercept and direction finding.